header-about

EECS Spring 2014 Seminar

Presenter: 
Sandip Ray
Title: 
Correct, Dependable, Trustworthy Systems in the Embedded Regime
Affiliation: 
Intel Corporation
Location: 
Glennan 313
Time: 
3:30-4:30pm
Date: 
May 8, 2014

In recent years, embedded systems have increasingly proliferated all aspects of our lives. Examples of such systems include smart phones, tablets, biomedical devices, automotive and avionics controllers, and wearables. Errors, malfunctions, and security vulnerabilities in these devices can cost millions of dollars to our economy, subvert our personal and national security, and lead to loss of human lives. On the other hand, with increasing diversity and complexity of embedded devices, it is also getting increasingly challenging to develop scalable techniques to build dependable systems or even analyze them adequately to identify errors and vulnerabilities.
In this talk I will discuss some of the critical challenges in developing correct, dependable, and trustworthy embedded systems for our current and future needs, focusing particularly on silicon validation and debug. Silicon validation is the dominant contributor to validation cost of modern embedded systems and System-on-Chip (SoC) designs, and directly affects time-to-market of a new system or platform. I will present some of my recent research on developing architecture and analysis frameworks for post-silicon hardware/software validation of
emerging embedded systems. The research is in the crossroads of hardware design, computer architecture, software engineering, verification, and security, and additionally it draws from formal methods, data analytics, and logic synthesis. The talk will provide a summary of the scope and complexity of this vast area.
Our frameworks and architectures have found application in industrial tools and flows. I will draw from this experience to identify some key challenges in designing complex embedded systems for emerging applications, and point to possible approaches to address them through a combination of design and validation techniques.

Biography: 

Dr. Sandip Ray is a Research Scientist at the Strategic CAD Labs, Intel Corporation. He received his Ph.D. in Computer Science from the University of Texas at Austin in 2005. His research focuses on developing correct, dependable, and trustworthy computing systems through cooperation of specification, synthesis, verification, and validation techniques. At Intel, he leads a multi-team, multi-site, cross-collaborative research program, developing robust validation infrastructure for Intel's next-generation embedded devices. The research touches on postsilicon debug quality; qualification, selection, and exploitation of post-silicon observability; trade-offs between design needs for validation, security, power, and performance; analytics on post-silicon trace data for effective error triage; and readiness and validation of post-silicon tests. Before joining Intel, Dr. Ray worked as a Research Scientist at the University of Texas at Austin, where he developed analysis frameworks for diverse computing systems ranging from synthesized hardware designs to software routines including binary and assembly programs. His work found application in major semiconductor companies like AMD, Freescale, IBM, Intel, Galois, and Rockwell Collins. During his academic tenure, he was a Principal Investigator in research grants from National Science Foundation (NSF), Defense Advanced Research Projects Agency (DARPA), and Semiconductor Research Corporation (SRC). Dr. Ray is the author of three books (two upcoming), as well as more than 40 peerreviewed research articles. He has served on the program committee of more than 20 international meetings and conferences, as co-chair for the International Conference on Formal Methods in Computer-Aided Design (FMCAD 2013) and International Workshop on the ACL2 Theorem Prover and Its Applications (ACL2 2009), as a guest editor for ACM Transactions on Design Automation of Electronic Systems (TODAES) and Springer Journal of Electronic Testing Theory and Applications (JETTA). He is a senior member of IEEE.